f3ac792c09
* Align ChibiOS spi_master behaviour with AVR * Rollback `spi_transmit()` and `spi_receive()` to preserve DMA
148 lines
4.5 KiB
C
148 lines
4.5 KiB
C
/* Copyright 2020 Nick Brassel (tzarc)
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include "spi_master.h"
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#include "quantum.h"
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#include "timer.h"
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static pin_t currentSlavePin = NO_PIN;
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static SPIConfig spiConfig = {false, NULL, 0, 0, 0, 0};
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__attribute__((weak)) void spi_init(void) {
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static bool is_initialised = false;
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if (!is_initialised) {
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is_initialised = true;
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// Try releasing special pins for a short time
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palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_INPUT);
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palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_INPUT);
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palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), PAL_MODE_INPUT);
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chThdSleepMilliseconds(10);
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#if defined(USE_GPIOV1)
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palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL);
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palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL);
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palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL);
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#else
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palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_ALTERNATE(SPI_SCK_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
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palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_ALTERNATE(SPI_MOSI_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
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palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), PAL_MODE_ALTERNATE(SPI_MISO_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
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#endif
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}
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}
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bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) {
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if (currentSlavePin != NO_PIN || slavePin == NO_PIN) {
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return false;
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}
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uint16_t roundedDivisor = 2;
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while (roundedDivisor < divisor) {
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roundedDivisor <<= 1;
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}
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if (roundedDivisor < 2 || roundedDivisor > 256) {
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return false;
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}
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spiConfig.cr1 = 0;
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if (lsbFirst) {
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spiConfig.cr1 |= SPI_CR1_LSBFIRST;
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}
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switch (mode) {
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case 0:
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break;
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case 1:
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spiConfig.cr1 |= SPI_CR1_CPHA;
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break;
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case 2:
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spiConfig.cr1 |= SPI_CR1_CPOL;
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break;
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case 3:
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spiConfig.cr1 |= SPI_CR1_CPHA | SPI_CR1_CPOL;
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break;
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}
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switch (roundedDivisor) {
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case 2:
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break;
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case 4:
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spiConfig.cr1 |= SPI_CR1_BR_0;
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break;
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case 8:
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spiConfig.cr1 |= SPI_CR1_BR_1;
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break;
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case 16:
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spiConfig.cr1 |= SPI_CR1_BR_1 | SPI_CR1_BR_0;
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break;
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case 32:
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spiConfig.cr1 |= SPI_CR1_BR_2;
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break;
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case 64:
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spiConfig.cr1 |= SPI_CR1_BR_2 | SPI_CR1_BR_0;
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break;
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case 128:
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spiConfig.cr1 |= SPI_CR1_BR_2 | SPI_CR1_BR_1;
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break;
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case 256:
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spiConfig.cr1 |= SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0;
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break;
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}
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currentSlavePin = slavePin;
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spiConfig.ssport = PAL_PORT(slavePin);
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spiConfig.sspad = PAL_PAD(slavePin);
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setPinOutput(slavePin);
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spiStart(&SPI_DRIVER, &spiConfig);
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spiSelect(&SPI_DRIVER);
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return true;
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}
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spi_status_t spi_write(uint8_t data) {
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uint8_t rxData;
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spiExchange(&SPI_DRIVER, 1, &data, &rxData);
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return rxData;
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}
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spi_status_t spi_read(void) {
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uint8_t data = 0;
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spiReceive(&SPI_DRIVER, 1, &data);
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return data;
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}
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spi_status_t spi_transmit(const uint8_t *data, uint16_t length) {
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spiSend(&SPI_DRIVER, length, data);
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return SPI_STATUS_SUCCESS;
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}
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spi_status_t spi_receive(uint8_t *data, uint16_t length) {
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spiReceive(&SPI_DRIVER, length, data);
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return SPI_STATUS_SUCCESS;
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}
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void spi_stop(void) {
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if (currentSlavePin != NO_PIN) {
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spiUnselect(&SPI_DRIVER);
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spiStop(&SPI_DRIVER);
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currentSlavePin = NO_PIN;
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}
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}
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