From 5e81cf7dc21f7f7d4621e0b9ed5dbb1547bfa371 Mon Sep 17 00:00:00 2001
From: Vivianne Langdon <puttabutta@gmail.com>
Date: Tue, 19 Jul 2022 02:48:52 -0700
Subject: [PATCH] start making pipeline

---
 src/rendering/vulkan/pipeline.zig | 55 +++++++++++++++++++++++++++++++
 1 file changed, 55 insertions(+)
 create mode 100644 src/rendering/vulkan/pipeline.zig

diff --git a/src/rendering/vulkan/pipeline.zig b/src/rendering/vulkan/pipeline.zig
new file mode 100644
index 0000000..d67b757
--- /dev/null
+++ b/src/rendering/vulkan/pipeline.zig
@@ -0,0 +1,55 @@
+const std = @import("std");
+const assert = std.debug.assert;
+const vk = @import("vulkan");
+
+const Device = @import("device.zig").Device;
+
+pub const Layout = struct {
+    pub fn init(device: *const Device, set_layouts: []*const vk.DescriptorSetLayout, ranges: []*const vk.PushConstantRange) !vk.PipelineLayout {
+        return try device.dispatch.createPipelineLayout(device.handle, &.{
+            .set_layout_count = set_layouts.len,
+            .p_set_layouts = set_layouts.ptr,
+            .push_constant_range_count = ranges.len,
+            .p_push_constant_ranges = ranges.ptr,
+        }, null);
+    }
+};
+
+pub const VertType = enum {
+    float,
+    float2,
+    float3,
+    float4,
+    int,
+    int2,
+    int3,
+    int4,
+
+    pub fn size(t: VertType) i32 {
+        return switch (t) {
+            .float => @sizeOf(f32),
+            .float2 => @sizeOf(Float2),
+            .float3 => @sizeOf(Float3),
+            .float4 => @sizeOf(Float4),
+            .int => @sizeOf(i32),
+            .int2 => @sizeOf(Int2),
+            .int3 => @sizeOf(Int3),
+            .int4 => @sizeOf(Int4),
+            else => assert(false),
+        };
+    }
+
+    pub fn format(t: VertType) vk.Format {
+        return switch (t) {
+            .float => .r32_sfloat,
+            .float2 => .r32g32_sfloat,
+            .float3 => .r32g32b32_sfloat,
+            .float4 => .r32g32b32a32_sfloat,
+            .int => .r32_sint,
+            .int2 => .r32g32_sint,
+            .int3 => .r32g32b32_sint,
+            .int4 => .r32g32b32a32_sint,
+            else => assert(false),
+        };
+    }
+};