08473753a0
* gnu/packages/databases.scm (firebird)[source]: Add patches. [arguments]: Add custom phase when building for riscv64-linux to force the bootstrap phase to occur. [native-inputs]: When building for riscv64-linux add autoconf, automake and libtool. * gnu/packages/patches/firebird-riscv64-support-pt1.patch, gnu/packages/patches/firebird-riscv64-support-pt2.patch: New files. * gnu/local.mk (dist_patch_DATA): Register them.
109 lines
4.3 KiB
Diff
109 lines
4.3 KiB
Diff
https://salsa.debian.org/firebird-team/firebird3.0/-/raw/master/debian/patches/upstream/riscv64-support.patch
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1e8e7858db84750a77006d307bf28e9686f9414e Patch for CORE-5779: support for riscv64, also some code fixes related with prior ports
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Minor corrections compared to the commit above due to whitespace/spelling
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differences with 3.0 version
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Bug-Debian: https://bugs.debian.org/895257
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Bug: http://tracker.firebirdsql.org/browse/CORE-5779
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--- a/configure.ac
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+++ b/configure.ac
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@@ -251,6 +251,18 @@ dnl CPU_TYPE=ppc64
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libdir=/usr/lib64
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;;
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+ riscv64*-*-linux*)
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+ MAKEFILE_PREFIX=linux_riscv64
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+ INSTALL_PREFIX=linux
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+ PLATFORM=LINUX
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+ AC_DEFINE(LINUX, 1, [Define this if OS is Linux])
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+ EDITLINE_FLG=Y
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+ SHRLIB_EXT=so
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+ STD_EDITLINE=true
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+ STD_ICU=true
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+ libdir=/usr/lib64
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+ ;;
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+
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powerpc64le-*-linux*)
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MAKEFILE_PREFIX=linux_powerpc64el
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INSTALL_PREFIX=linux
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--- a/src/common/classes/DbImplementation.cpp
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+++ b/src/common/classes/DbImplementation.cpp
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@@ -49,6 +49,7 @@ static const UCHAR CpuAlpha = 14;
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static const UCHAR CpuArm64 = 15;
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static const UCHAR CpuPowerPc64el = 16;
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static const UCHAR CpuM68k = 17;
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+static const UCHAR CpuRiscV64 = 18;
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static const UCHAR OsWindows = 0;
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static const UCHAR OsLinux = 1;
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@@ -89,7 +90,8 @@ const char* hardware[] = {
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"Alpha",
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"ARM64",
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"PowerPC64el",
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- "M68k"
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+ "M68k",
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+ "RiscV64"
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};
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const char* operatingSystem[] = {
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@@ -116,22 +118,22 @@ const char* compiler[] = {
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// This table lists pre-fb3 implementation codes
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const UCHAR backwardTable[FB_NELEM(hardware) * FB_NELEM(operatingSystem)] =
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{
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-// Intel AMD Sparc PPC PPC64 MIPSEL MIPS ARM IA64 s390 s390x SH SHEB HPPA Alpha ARM64 PowerPC64el
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-/* Windows */ 50, 68, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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-/* Linux */ 60, 66, 65, 69, 86, 71, 72, 75, 76, 79, 78, 80, 81, 82, 83, 84, 85,
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-/* Darwin */ 70, 73, 0, 63, 77, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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-/* Solaris */ 0, 0, 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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-/* HPUX */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 31, 0, 0, 0,
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-/* AIX */ 0, 0, 0, 35, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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-/* MVS */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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-/* FreeBSD */ 61, 67, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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-/* NetBSD */ 62, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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+// Intel AMD Sparc PPC PPC64 MIPSEL MIPS ARM IA64 s390 s390x SH SHEB HPPA Alpha ARM64 PPC64el M68k RiscV64
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+/* Windows */ 50, 68, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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+/* Linux */ 60, 66, 65, 69, 86, 71, 72, 75, 76, 79, 78, 80, 81, 82, 83, 84, 85, 87, 88,
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+/* Darwin */ 70, 73, 0, 63, 77, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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+/* Solaris */ 0, 0, 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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+/* HPUX */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 31, 0, 0, 0, 0, 0,
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+/* AIX */ 0, 0, 0, 35, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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+/* MVS */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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+/* FreeBSD */ 61, 67, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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+/* NetBSD */ 62, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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};
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const UCHAR backEndianess[FB_NELEM(hardware)] =
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{
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-// Intel AMD Sparc PPC PPC64 MIPSEL MIPS ARM IA64 s390 s390x SH SHEB HPPA Alpha ARM64 PowerPC64el M68k
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- 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 1, 0, 1, 1, 0, 0, 0, 1
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+// Intel AMD Sparc PPC PPC64 MIPSEL MIPS ARM IA64 s390 s390x SH SHEB HPPA Alpha ARM64 PPC64el M68k RiscV64
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+ 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 1, 0, 1, 1, 0, 0, 0, 1, 0,
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};
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} // anonymous namespace
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--- a/src/common/common.h
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+++ b/src/common/common.h
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@@ -135,6 +135,10 @@
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#define FB_CPU CpuArm64
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#endif /* ARM64 */
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+#ifdef RISCV64
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+#define FB_CPU CpuRiscV64
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+#endif /* RISCV64 */
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+
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#ifdef sparc
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#define FB_CPU CpuUltraSparc
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#define RISC_ALIGNMENT
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--- a/src/jrd/inf_pub.h
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+++ b/src/jrd/inf_pub.h
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@@ -247,7 +247,7 @@ enum info_db_implementations
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isc_info_db_impl_linux_ppc64el = 85,
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isc_info_db_impl_linux_ppc64 = 86,
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isc_info_db_impl_linux_m68k = 87,
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-
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+ isc_info_db_impl_linux_riscv64 = 88,
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isc_info_db_impl_last_value // Leave this LAST!
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};
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