cpu: Be consistent with x86_64 micro-architecture names.
* gnu/packages/golang.scm (%go-1.18-x86_64-micro-architectures): Rename micro-architectures from x86_64-v* to x86-64-v*. * guix/cpu.scm (cpu->gcc-architecture): Return x86-64 as the fallback. (cpu->micro-architecture-level): Rename micro-architectures from x86_64-v* to x86-64-v*. (gcc-architecture->micro-architecture-level): Same. Change-Id: I37db65970417c22699ae8097b0361bccf76c1267
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2 changed files with 11 additions and 11 deletions
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@ -870,7 +870,7 @@ (define-public go-1.17
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("powerpc64le" ,@%go-1.17-powerpc64le-micro-architectures))))))
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(define %go-1.18-x86_64-micro-architectures
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(list "x86_64-v1" "x86_64-v2" "x86_64-v3" "x86_64-v4"))
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(list "x86-64-v1" "x86-64-v2" "x86-64-v3" "x86-64-v4"))
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(define-public go-1.18
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(package
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20
guix/cpu.scm
20
guix/cpu.scm
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@ -200,7 +200,7 @@ (define (cpu->gcc-architecture cpu)
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;; TODO: Recognize CENTAUR/CYRIX/NSC?
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"x86_64")))
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"x86-64")))
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("aarch64"
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;; Transcribed from GCC's list of aarch64 processors in aarch64-cores.def
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;; What to do with big.LITTLE cores?
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@ -290,12 +290,12 @@ (define (cpu->micro-architecture-level cpu)
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;; v2: CMPXCHG16B, LAHF, SAHF, POPCNT, SSE3, SSE4.1, SSE4.2, SSSE3
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("avx512f" "avx512bw" "abx512cd" "abx512dq" "avx512vl"
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"avx" "avx2" "bmi1" "bmi2" "f16c" "fma" "movbe"
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"popcnt" "sse3" "sse4_1" "sse4_2" "ssse3" => "x86_64-v4")
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"popcnt" "sse3" "sse4_1" "sse4_2" "ssse3" => "x86-64-v4")
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("avx" "avx2" "bmi1" "bmi2" "f16c" "fma" "movbe"
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"popcnt" "sse3" "sse4_1" "sse4_2" "ssse3" => "x86_64-v3")
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("popcnt" "sse3" "sse4_1" "sse4_2" "ssse3" => "x86_64-v2")
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(_ => "x86_64-v1")))
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"x86_64-v1"))
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"popcnt" "sse3" "sse4_1" "sse4_2" "ssse3" => "x86-64-v3")
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("popcnt" "sse3" "sse4_1" "sse4_2" "ssse3" => "x86-64-v2")
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(_ => "x86-64-v1")))
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"x86-64-v1"))
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(architecture
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;; TODO: More architectures
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architecture)))
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@ -304,22 +304,22 @@ (define (gcc-architecture->micro-architecture-level gcc-architecture)
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"Return a matching psABI micro-architecture, allowing optimizations for x86_64
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CPUs for compilers which don't allow for more focused optimizing."
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;; Matching gcc-architectures isn't an easy task, with the rule-of-thumb being
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;; AVX512F+ for x86_64-v4, AVX+ for x86_64-v3.
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;; AVX512F+ for x86-64-v4, AVX+ for x86-64-v3.
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;; https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex
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(match gcc-architecture
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((or "graniterapids-d" "graniterapids" "tigerlake" "sapphirerapids"
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"cooperlake" "icelake-server" "icelake-client" "cannonlake" "knm"
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"knl" "skylake-avx512"
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"znver4")
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"x86_64-v4")
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"x86-64-v4")
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((or "pantherlake" "clearwaterforest" "arrowlake-s" "sierraforest"
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"alderlake" "skylake" "broadwell" "haswell"
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"znver3" "znver2" "znver1" "bdver4")
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"x86_64-v3")
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"x86-64-v3")
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((or "sandybridge" "tremont" "goldmont-plus" "goldmont" "silvermont"
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"nehalem" "bonnell" "core2"
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"btver2" "athalon" "k8-sse3" "k8" "bdver3" "bdver2" "bdver1" "btver1"
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"amdfam10"
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"lujiazui" "yongfeng" "x86-64")
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"x86_64-v1")
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"x86-64-v1")
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(_ gcc-architecture)))
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