34 lines
1.1 KiB
Diff
34 lines
1.1 KiB
Diff
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From c4ff1e68c621928abc680266cad0a451686c403b Mon Sep 17 00:00:00 2001
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From: Jan Beulich <jbeulich@suse.com>
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Date: Tue, 2 Jun 2015 15:07:01 +0000
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Subject: [PATCH] xen/pt: correctly handle PM status bit
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xen_pt_pmcsr_reg_write() needs an adjustment to deal with the RW1C
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nature of the not passed through bit 15 (PCI_PM_CTRL_PME_STATUS).
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This is a preparatory patch for XSA-131.
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Signed-off-by: Jan Beulich <jbeulich@suse.com>
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Reviewed-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
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---
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hw/xen/xen_pt_config_init.c | 3 ++-
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1 file changed, 2 insertions(+), 1 deletion(-)
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diff --git a/hw/xen/xen_pt_config_init.c b/hw/xen/xen_pt_config_init.c
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index 516236a..027ac32 100644
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--- a/hw/xen/xen_pt_config_init.c
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+++ b/hw/xen/xen_pt_config_init.c
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@@ -948,7 +948,8 @@ static int xen_pt_pmcsr_reg_write(XenPCIPassthroughState *s,
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/* create value for writing to I/O device register */
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throughable_mask = ~reg->emu_mask & valid_mask;
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- *val = XEN_PT_MERGE_VALUE(*val, dev_value, throughable_mask);
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+ *val = XEN_PT_MERGE_VALUE(*val, dev_value & ~PCI_PM_CTRL_PME_STATUS,
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+ throughable_mask);
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return 0;
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}
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--
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2.2.1
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