63 lines
2.5 KiB
PHP
63 lines
2.5 KiB
PHP
;THE COMPUTER CODE CONTAINED HEREIN IS THE SOLE PROPERTY OF PARALLAX
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;SOFTWARE CORPORATION ("PARALLAX"). PARALLAX, IN DISTRIBUTING THE CODE TO
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;END-USERS, AND SUBJECT TO ALL OF THE TERMS AND CONDITIONS HEREIN, GRANTS A
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;ROYALTY-FREE, PERPETUAL LICENSE TO SUCH END-USERS FOR USE BY SUCH END-USERS
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;IN USING, DISPLAYING, AND CREATING DERIVATIVE WORKS THEREOF, SO LONG AS
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;SUCH USE, DISPLAY OR CREATION IS FOR NON-COMMERCIAL, ROYALTY OR REVENUE
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;FREE PURPOSES. IN NO EVENT SHALL THE END-USER USE THE COMPUTER CODE
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;CONTAINED HEREIN FOR REVENUE-BEARING PURPOSES. THE END-USER UNDERSTANDS
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;AND AGREES TO THE TERMS HEREIN AND ACCEPTS THE SAME BY USE OF THIS FILE.
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;COPYRIGHT 1993-1998 PARALLAX SOFTWARE CORPORATION. ALL RIGHTS RESERVED.
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;
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; $Source: /cvs/cvsroot/d2x/arch/dos_vgaregs.inc,v $
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; $Revision: 1.1.1.1 $
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; $Author: bradleyb $
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; $Date: 2001-01-19 03:33:51 $
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;
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; Readable descriptions of VGA ports.
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;
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; $Log: not supported by cvs2svn $
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; Revision 1.1.1.1 1999/06/14 21:58:45 donut
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; Import of d1x 1.37 source.
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;
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; Revision 1.2 1993/10/15 16:22:45 john
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; *** empty log message ***
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;
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; Revision 1.1 1993/09/08 11:41:00 john
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; Initial revision
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;
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;
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;
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%define MISC_OUTPUT 03c2h ;Miscellaneous Output register
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%define MAP_MASK 02h ;index in SC of Map Mask register
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%define READ_MAP 04h ;index in GC of the Read Map register
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%define BIT_MASK 08h ;index in GC of Bit Mask register
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%define SC_INDEX 3c4h ;Index register for sequencer ctrl.
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%define SC_MAP_MASK 2 ;Number of map mask register
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%define SC_INDEX 3c4h ;Index register for sequencer ctrl.
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%define SC_MAP_MASK 2 ;Number of map mask register
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%define SC_MEM_MODE 4 ;Number of memory mode register
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%define GC_INDEX 3ceh ;Index register for graphics ctrl.
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%define GC_READ_MAP 4 ;Number of read map register
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%define GC_GRAPH_MODE 5 ;Number of graphics mode register
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%define GC_MISCELL 6 ;Number of miscellaneous register
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%define CRTC_INDEX 3d4h ;Index register for CRT controller
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%define CC_MAX_SCAN 9 ;Number of maximum scan line reg.
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%define CC_START_HI 0Ch ;Number of start address high register
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%define CC_START_LO 0Dh ;Number of start address low register
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%define CC_UNDERLINE 14h ;Number of underline register
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%define CC_MODE_CTRL 17h ;Number of mode control register
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%define CRTC_OFFSET 13h ; CRTC offset register index
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%define DAC_WRITE_ADR 3C8h ;DAC write address
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%define DAC_READ_ADR 3C7h ;DAC read address
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%define DAC_DATA 3C9h ;DAC data register
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%define VERT_RESCAN 3DAh ;Input status register #1
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